x_heep_gen.ram_bank module

class x_heep_gen.ram_bank.Bank(size_k: int, start_address: int, map_idx: int, il_level: int = 0, il_offset: int = 0)

Bases: object

Represents a ram bank

Parameters:

  • size_k (int) – size in kiB

  • start_address (int) – start address of the bank, in interleaved mode it should be the start address od the whole group

  • map_idx (int) – index in the global address map. Has to be unique. Interleaved mode banks should have consecutive indices.

  • il_level (int) – number of bits used for interleaving.

  • il_offset (int) – position in interleaved bank group if in any else 0. Should be consistent with map_idx.

Raises:

  • TypeError – when parameters don’t have the right type.

  • ValueError – when size_k isn’t a power of two.

  • ValueError – when start_address is not aligned on size.

  • ValueError – when il_offset is to big for the given il_level().

end_address() → int
Returns:

the end address

Return type:

int

il_level() → int
Returns:

the number of bits used to choose the bank when it is in an interleaved group else 0

Return type:

int

il_offset() → int
Returns:

the position of the bank in an interleaved group.

Return type:

int

map_idx() → int
Returns:

the index used in global bus

Return type:

int

name() → str
Returns:

the bank name

Return type:

str

size() → int
Returns:

the bank size in Bytes

Return type:

int

start_address() → int
Returns:

the start address

Return type:

int

class x_heep_gen.ram_bank.ILRamGroup(start: int, size: int, n: int, first_name: str)

Bases: object

Dataclass to represent information about interleaved memory banks group.

first_name: str

name of the first bank

n: int

number of banks in the group

size: int

size of the group

start: int

start address of the group

x_heep_gen.ram_bank.is_pow2(n: int) → bool

check if n is a power of two

Parameters:

n (int) – number to be checked

Returns:

True if n is a power of two

Return type:

bool