X-HEEP
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Integrate Analog / Mixed-Signal simulations
Compile with Makefile
Debug
Execute Code from FLASH
Set up an IDE
Implement on ASIC
Integrate Peripherals
Generate OpenTitan IPs
Program the FLASH on the EPFL Programmer
Run on FPGA
Execute From Flash
Emulation on Xilinx FPGAs
Simulate
SystemC model
Update the documentation
eXtend X-HEEP
Peripherals
DMA
Configuration
Configuration
x_heep_gen
X-HEEP
Index
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Index
A
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B
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C
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E
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F
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H
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I
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L
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M
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N
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O
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R
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S
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V
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X
A
add_linker_section() (x_heep_gen.system.XHeep method)
add_linker_section_for_banks() (x_heep_gen.system.XHeep method)
add_ram_banks() (x_heep_gen.system.XHeep method)
add_ram_banks_il() (x_heep_gen.system.XHeep method)
B
Bank (class in x_heep_gen.ram_bank)
build() (x_heep_gen.system.XHeep method)
bus_type (x_heep_gen.system.Override attribute)
bus_type() (x_heep_gen.system.XHeep method)
BusType (class in x_heep_gen.system)
by_size() (x_heep_gen.linker_section.LinkerSection static method)
C
check() (x_heep_gen.linker_section.LinkerSection method)
E
end (x_heep_gen.linker_section.LinkerSection attribute)
end_address() (x_heep_gen.ram_bank.Bank method)
F
first_name (x_heep_gen.ram_bank.ILRamGroup attribute)
H
has_il_ram() (x_heep_gen.system.XHeep method)
I
IL_COMPATIBLE_BUS_TYPES (x_heep_gen.system.XHeep attribute)
il_level() (x_heep_gen.ram_bank.Bank method)
il_offset() (x_heep_gen.ram_bank.Bank method)
ILRamGroup (class in x_heep_gen.ram_bank)
is_pow2() (in module x_heep_gen.ram_bank)
iter_bank_numwords() (x_heep_gen.system.XHeep method)
iter_cont_ram_banks() (x_heep_gen.system.XHeep method)
iter_il_groups() (x_heep_gen.system.XHeep method)
iter_il_ram_banks() (x_heep_gen.system.XHeep method)
iter_linker_sections() (x_heep_gen.system.XHeep method)
iter_ram_banks() (x_heep_gen.system.XHeep method)
L
LinkerSection (class in x_heep_gen.linker_section)
M
map_idx() (x_heep_gen.ram_bank.Bank method)
module
x_heep_gen.linker_section
x_heep_gen.ram_bank
x_heep_gen.system
N
n (x_heep_gen.ram_bank.ILRamGroup attribute)
name (x_heep_gen.linker_section.LinkerSection attribute)
name() (x_heep_gen.ram_bank.Bank method)
NtoM (x_heep_gen.system.BusType attribute)
numbanks (x_heep_gen.system.Override attribute)
numbanks_il (x_heep_gen.system.Override attribute)
O
onetoM (x_heep_gen.system.BusType attribute)
Override (class in x_heep_gen.system)
R
ram_il_size() (x_heep_gen.system.XHeep method)
ram_numbanks() (x_heep_gen.system.XHeep method)
ram_numbanks_cont() (x_heep_gen.system.XHeep method)
ram_numbanks_il() (x_heep_gen.system.XHeep method)
ram_size_address() (x_heep_gen.system.XHeep method)
ram_start_address() (x_heep_gen.system.XHeep method)
S
size (x_heep_gen.linker_section.LinkerSection property)
(x_heep_gen.ram_bank.ILRamGroup attribute)
size() (x_heep_gen.ram_bank.Bank method)
start (x_heep_gen.linker_section.LinkerSection attribute)
(x_heep_gen.ram_bank.ILRamGroup attribute)
start_address() (x_heep_gen.ram_bank.Bank method)
V
validate() (x_heep_gen.system.XHeep method)
X
x_heep_gen.linker_section
module
x_heep_gen.ram_bank
module
x_heep_gen.system
module
XHeep (class in x_heep_gen.system)
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